Serial link voltage margin determination in mission mode
US8599909B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 4, 2010 |
| Grant date | Dec 3, 2013 |
| Priority date | — |
| Expiry date | Mar 29, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/14
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
This disclosure describes systems and methods for determining a voltage margin (or margin) of a serializer/deserializer (SerDes) receiver in mission mode using a SerDes receiver. This is done by time-division multiplexing a margin determination and a tap weight adaptation onto the same hardware (or software, or combination of hardware and software). In other words, some parts of a SerDes receiver (e.g., an error slicer and an adaptation module) can be used for two different tasks at different times without degrading the effectiveness or bandwidth of the receiver. Hence, the disclosed systems and methods allow a SerDes receiver to determine the SerDes margin in mission mode and without any additional hardware or circuitry on the receiver chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.