Method for making dual silicide and germanide semiconductors
US8603882B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 2011 |
| Grant date | Dec 10, 2013 |
| Priority date | — |
| Expiry date | May 13, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/601
Abstract
A method for making a dual silicide or germanide semiconductor comprises steps of providing a semiconductor substrate, forming a gate, forming source/drain regions, forming a first silicide, reducing spacers thickness and forming a second silicide. Forming a gate comprises forming an insulating layer over the semiconductor substrate, and forming the gate over the insulating layer. Forming source/drain regions comprises forming lightly doped source/drain regions in the semiconductor substrate adjacent to the insulating layer, forming spacers adjacent to the gate and over part of the lightly doped source/drain regions, and forming heavily doped source/drain regions in the semiconductor substrate. The first silicide is formed on an exposed surface of lightly and heavily doped source/drain regions. The second silicide is formed on an exposed surface of lightly doped source/drain regions. A first germanide and second germanide may replace the first silicide and the second silicide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.