Method and system for bandwidth enhancement using hybrid inductors
US8604866B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 16, 2012 |
| Grant date | Dec 10, 2013 |
| Priority date | — |
| Expiry date | Oct 16, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H11/48
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and system for bandwidth enhancement using hybrid inductors are disclosed and may include a complementary metal oxide semiconductor (CMOS) transceiver providing an electrical impedance that increases with frequency via hybrid inductors comprising a transistor, a capacitor, an inductor, and a resistor. A first terminal of the hybrid inductors may comprise a first terminal of the transistor. A second terminal of the transistor may be coupled to a first terminal of the resistor and a first terminal of the capacitor. A second terminal of the resistor may comprise a second terminal of the hybrid inductors. A third terminal of the transistor may be coupled to a first terminal of an inductor, and a second terminal of the inductor may be coupled to a second terminal of the capacitor. The hybrid inductors may be configured by varying transconductance, resistance, and/or capacitance and may be utilized as an amplifier load.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.