Multiplier-free algorithms for sample-time and gain mismatch error estimation in a two-channel time-interleaved analog-to-digital converter
US8604952B2 · kind B2 · utility
6Cited by
7References
17Claims
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Key dates
| Filing date | Mar 7, 2012 |
| Grant date | Dec 10, 2013 |
| Priority date | — |
| Expiry date | Mar 7, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1215
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Techniques for the estimation of sample-time and gain mismatch errors in a two-channel time interleaved analog to digital converter that are devoid of any multiplication operation. In a sample-time mismatch error evaluation, the signs and the absolute values from the two ADCs are used to provide an estimate of the sample-time mismatch error. In a gain error estimation algorithm, the absolute values of the outputs from the two ADCs are subtracted and accumulated. The errors can then be corrected, in a preferred embodiment, using suitable adaptive sample time and gain correction techniques.
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