Partition-free multi-socket memory system architecture
US8605099B2 · kind B2 · utility
0Cited by
14References
30Claims
0Family size
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Key dates
| Filing date | Mar 31, 2008 |
| Grant date | Dec 10, 2013 |
| Priority date | — |
| Expiry date | Dec 14, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/5016
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A technique to increase memory bandwidth for throughput applications. In one embodiment, memory bandwidth can be increased, particularly for throughput applications, without increasing interconnect trace or pin count by pipelining pages between one or more memory storage areas on half cycles of a memory access clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.