Variable resistance memory devices using read mirror currents
US8605517B2 · kind B2 · utility
7Cited by
1References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 9, 2012 |
| Grant date | Dec 10, 2013 |
| Priority date | — |
| Expiry date | Mar 31, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/0045
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory device includes a variable resistance memory element and a read circuit coupled to the variable resistance memory element at a first signal node and configured to provide a read current to the variable resistance memory element via the first signal node, to a provide a mirror current at a second signal node responsive to the cell current and to generate an output signal indicative of a state of the variable resistance memory element responsive to a voltage at the second signal node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.