Semiconductor device and semiconductor memory device
US8605524B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 16, 2012 |
| Grant date | Dec 10, 2013 |
| Priority date | — |
| Expiry date | Oct 16, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4091
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a memory cell, a first bit line coupled to the memory cell, a second bit line, a first sense amplifier circuit including first and second transistors, the first transistor including a gate coupled to the first bit line, and the first and second transistors are coupled in series between the second bit line and a first voltage line, a temperature detection circuit configured to detect a temperature of the semiconductor device, and a control circuit configured to receive an output of the temperature detection circuit and supply a control signal to a gate of the second transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.