Receiver training with cycle slip detection and correction
US8605847B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 9, 2011 |
| Grant date | Dec 10, 2013 |
| Priority date | — |
| Expiry date | Jan 25, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2025/037
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In described embodiments, a transceiver includes a clock and data recovery module (CDR) with an eye monitor and a cycle slip monitor. The cycle slip detector monitors a CDR lock condition, which might be through detection of slips in sampling and/or transition timing detection. The cycle slip detector provides a check point to sense system divergence, allowing for a mechanism to recover CDR lock. In addition, when the CDR is out-of-lock, the various parameters that are adaptively set (e.g., equalizer parameters) might be invalid during system divergence. Consequently, these parameters might be declared invalid by the system and not used.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.