Polyphase harmonic rejection mixer
US8606210B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 3, 2010 |
| Grant date | Dec 10, 2013 |
| Priority date | — |
| Expiry date | May 29, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D2200/0086
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A polyphase harmonic rejection mixer, comprising a plurality of stages following each other; wherein a first stage is arranged to perform at least frequency conversion; and a second stage is arranged to perform at least selective weighting and combining; wherein at least two of the plurality of stages are arranged to perform at least combining. In an embodiment, the first stage (28) comprises three single-ended gain blocks (10, 12, 14), arranged to perform selective weighting, frequency conversion and combining; and a second stage (30) following the first stage (28) and arranged to perform selective weighting and combining. The second stage (30) may reduce the number of phases output by the first stage (28) and may output (32) a complex differential down converted signal. The mixer may be directly interfaced to an antenna of an LNA-less receiver without weighting in the first stage. The mixer may be included in a software-defined radio.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.