E-PDCCH design for reducing blind decoding
US8606286B2 · kind B2 · utility
19Cited by
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19Claims
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Key dates
| Filing date | Sep 25, 2012 |
| Grant date | Dec 10, 2013 |
| Priority date | — |
| Expiry date | Sep 25, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L5/0048
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A user equipment (UE) is provided. The UE comprises a processor. The processor is configured to receive an extended physical downlink control channel (E-PDCCH) in an E-PDCCH region that has been partitioned into at least two partitions. A first partition contains control channel elements (CCEs) with a first set of aggregation levels, and a second partition contains CCEs with a second set of aggregation levels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.