Apparatus, system, and method for memory configuration analysis
US8606545B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 2009 |
| Grant date | Dec 10, 2013 |
| Priority date | — |
| Expiry date | Dec 26, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/88
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus, system, and method are disclosed for memory configuration analysis. A classification module 402 determines 1000 an overall performance of an array 706 of memory devices 500 in a computer memory 104, wherein overall performance has a substantially inverse relationship with a highest quantity of members of a subset of the array and a substantially direct relationship with an individual performance capability of the members. A counting module 404 takes a count 1110 of members of the array 706 whose individual performance capability varies 1108 in a selected direction from the overall performance of the array 706. A comparison module 406 takes a selected action such as issuing a memory configuration warning 1114 if the count crosses a predetermined threshold 1112 comprising a predetermined percentage for comparison with the count, as qualified by the individual performance capability, divided by an unqualified count of members of the array 706.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.