Low-current inverter circuit
US8610464B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 15, 2010 |
| Grant date | Dec 17, 2013 |
| Priority date | — |
| Expiry date | Jun 15, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/09445
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The circuit includes an E-mode transistor with gate-source junction, a D-mode transistor with gate-source junction, a component generating a voltage drop between the source of the D-mode transistor and the drain of the E-mode transistor, and a connection between the drain of the E-mode transistor and the gate of the D-mode transistor. The gate of the E-mode transistor is provided for an input signal, and the drain of the E-mode transistor is provided for an output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.