Method for programming a resistive memory cell, a method and a memory apparatus for programming one or more resistive memory cells in a memory array
US8611135B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2012 |
| Grant date | Dec 17, 2013 |
| Priority date | — |
| Expiry date | Jun 16, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/0092
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for programming a resistive memory cell is provided. The method may include providing a programming signal to the resistive memory cell. The programming signal may include an electrical pulse and a bias pulse coupled with the electrical pulse. The electrical pulse includes an electrical pulse portion, and the bias pulse includes at least two bias pulse portions, wherein the electrical pulse portion is positioned between the at least two bias pulse portions. The bias pulse includes a voltage below a threshold switching voltage of the resistive memory cell. The programming signal includes a peak voltage above the threshold switching voltage of the resistive memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.