Mechanisms for utilizing efficiency metrics to control embedded dynamic random access memory power states on a semiconductor integrated circuit package
US8611170B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2011 |
| Grant date | Dec 17, 2013 |
| Priority date | — |
| Expiry date | Dec 30, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Power management of an embedded dynamic random access memory (eDRAM) using collected performance counter statistics to generating a set of one or more eDRAM effectiveness predictions. Using a set of one or more eDRAM effectiveness thresholds, each corresponding to one of the set of eDRAM effectiveness predictions, to determine whether at least one eDRAM effectiveness prediction has crossed over threshold. In the case that at least one eDRAM effectiveness prediction has crossed over its threshold, transitioning the eDRAM to a new power state. Power management is achieved by transitioning to a power-off state or self-refresh state and reducing the amount of power consumed by the eDRAM as compared to a power-on state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.