Patent · US Active

Maintaining packet order using hash-based linked-list queues

US8611216B2 · kind B2 · utility

0Cited by
16References
20Claims
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Inventors

Key dates

Filing dateSep 30, 2011
Grant dateDec 17, 2013
Priority date
Expiry dateDec 17, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L49/351
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

Ordering logic ensures that data items being processed by a number of parallel processing units are unloaded from the processing units in the original per-flow order that the data items were loaded into the parallel processing units. The ordering logic includes a pointer memory, a tail vector, and a head vector. Through these three elements, the ordering logic keeps track of a number of “virtual queues” corresponding to the data flows. A round robin arbiter unloads data items from the processing units only when a data item is at the head of its virtual queue.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.