IFFT processing in wireless communications
US8612504B2 · kind B2 · utility
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7References
26Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 18, 2006 |
| Grant date | Dec 17, 2013 |
| Priority date | — |
| Expiry date | Sep 13, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/2626
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Techniques for performing IFFT pipelining are described. In some aspects, the pipelining is achieved with a processing system having a memory having first and second sections, an encoder configured to process data in each of the first and second memory sections, an IFFT configured to process the encoded data in the first and second memory sections, and a post-processor configured to process the IFFT processed data in the first memory section while the IFFT is processing the encoded data in the second memory section, the post processor configured to operate at a different clock speed than the encoder or the IFFT.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.