Asynchronous circuit with an at-speed built-in self-test (BIST) architecture
US8612815B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2011 |
| Grant date | Dec 17, 2013 |
| Priority date | — |
| Expiry date | Feb 22, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3187
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Disclosed are integrated circuits that incorporate an asynchronous circuit with a built-in self-test (BIST) architecture using a handshaking protocol for at-speed testing to detect stuck-at faults. Specifically, a test pattern generator applies test patterns to an asynchronous circuit and an analyzer analyzes the output test data. The handshaking protocol is achieved through the use of a single pulse generator, which applies a single pulse to the test pattern generator to force switching of the test pattern request signal and, thereby to control application of the test patterns to the asynchronous circuit and subsequent switching of the test pattern acknowledge signal. Generation of this single pulse can in turn be forced by the switching of the test pattern acknowledge signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.