Utilization of organic buffer layer to fabricate high performance carbon nanoelectronic devices
US8614435B2 · kind B2 · utility
4Cited by
4References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 3, 2009 |
| Grant date | Dec 24, 2013 |
| Priority date | — |
| Expiry date | Feb 13, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6741
Abstract
A fabrication process for a nanoelectronic device and a device are provided. Channel material is deposited on a substrate to form a channel. A source metal contact and a drain metal contact are deposited on the channel material, and the source metal contact and the drain metal contact are on opposing ends of the channel material. A polyhydroxystyrene derivative is deposited on the channel material. A top gate oxide is deposited on the polymer layer. A top gate metal is deposited on the top gate oxide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.