Voltage regulator structures and methods with bootstrapped bias capacitor
US8614567B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 5, 2011 |
| Grant date | Dec 24, 2013 |
| Priority date | — |
| Expiry date | Feb 24, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Voltage regulator structures and methods embodiments are provided which employ a high-side N-type switching transistor to thereby enhance system efficiency and also reduce the die area required by these regulator structures. This structure and its advantages, however, require a gate drive signal higher than the input voltage of the voltage regulator. The embodiments resolve this need with a bias capacitor in a bootstrapped arrangement and a control loop arranged to maintain a bias voltage across the capacitor sufficient to always insure rapid switching of the high-side switching transistor during a pulse-width modulation (PWM) operational mode. The embodiments further include a second control loop arranged to insure sufficient voltage across the capacitor during a pulse-frequency modulation (PFM) operational mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.