Power factor correction stage with an adjustable delay time
US8614902B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2010 |
| Grant date | Dec 24, 2013 |
| Priority date | — |
| Expiry date | Feb 13, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M1/4225
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A power factor correction stage comprising: an input terminal configured to receive an input signal; an output terminal configured to provide an output signal; a first converter stage and one or more further converter stages, wherein each of the converter stages is connected to the input terminal and the output terminal, and each converter stage comprises a switch; and a controller configured to operate the switches of the converter stages. The controller is configured to operate the switch of the one or more further converter stages at a period of time after operation of the switch of the first converter stage for a current switching cycle, wherein the period of time corresponds to a proportion of the switching frequency for an earlier switching cycle that does not correspond to substantially the period of the earlier switching cycle divided by the number of converter stages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.