Forward error correction with parallel error detection for flash memories
US8615700B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 18, 2010 |
| Grant date | Dec 24, 2013 |
| Priority date | — |
| Expiry date | Jan 20, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1068
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems, and devices are described for forward error correction for flash memory. Encoded data from flash memory may be used to generate a number of data streams. At each of a number of error detection sub-modules operating in parallel, a different one of the data streams is processed. Each error detection sub-module may detect whether a portion of the respective received stream contains an error, and forward the portion to an error correction module. The error correction module, physically separate from the error detection sub-modules, may correct the forwarded portions of the respective received streams containing an error. The age and error rate associated with the flash memory may be monitored, and a coding rate or other aspects may be dynamically adapted to account for these factors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.