Methods of forming secured metal gate antifuse structures
US8618613B2 · kind B2 · utility
1Cited by
8References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2011 |
| Grant date | Dec 31, 2013 |
| Priority date | — |
| Expiry date | Jun 5, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D8/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of forming and using a microelectronic structure are described. Embodiments include forming a diode between a metal fuse gate and a PMOS device, wherein the diode is disposed between a contact of the metal fuse gate and a contact of the PMOS device, and wherein the diode couples the contact of the metal fuse gate to the contact of the PMOS device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.