Level-shifting interface for a processor-based device
US8618844B2 · kind B2 · utility
0Cited by
3References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2012 |
| Grant date | Dec 31, 2013 |
| Priority date | — |
| Expiry date | Mar 22, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/017509
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus includes an integrated circuit, which includes an input terminal, a second terminal to communicate with circuitry external to the integrated circuit, a multiplexer, a level shifter and a processor. The multiplexer is adapted to selectively couple the input terminal, the level shifter and the second output terminal together.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.