Shadow latch
US8618856B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2011 |
| Grant date | Dec 31, 2013 |
| Priority date | — |
| Expiry date | Mar 31, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356121
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A latch device is provided with a driver and a shadow latch. The driver has an input to accept a binary driver input signal, an input to accept a clock signal, and an input to accept a shadow-Q signal. The driver has an output to supply a binary Q signal equal to the inverse of the driver input signal, in response to the driver input signal, the shadow-Q signal, and the clock signal. The shadow latch has an input to accept the driver input signal, and an input to accept the clock signal. The shadow latch has an output to supply the shadow-Q signal equal to the inverted Q signal, in response to the driver input signal and clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.