Noise reduction device and semiconductor device having the same
US8618871B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 17, 2012 |
| Grant date | Dec 31, 2013 |
| Priority date | — |
| Expiry date | Oct 17, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/3565
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a first terminal for receiving a first signal; a second terminal for receiving a second signal having more restriction than the first signal with respect to a delay upon transmitting to an internal circuit; a first noise reduction circuit; and a second noise reduction circuit. The first noise reduction circuit includes a first Schmitt circuit for receiving the first signal from the first terminal; and an output signal adjusting unit for adjusting an output signal of the first Schmitt circuit when the output signal is maintained for a specific period of time after the output signal is varied. The second noise reduction circuit includes a second Schmitt circuit for receiving the second signal from the second terminal; and an input signal adjusting unit for adjusting the second signal input to the second Schmitt circuit according to a fluctuation of a power source voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.