Substrate supports for semiconductor applications
US8619406B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 27, 2011 |
| Grant date | Dec 31, 2013 |
| Priority date | — |
| Expiry date | Dec 26, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/6831
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This invention relates to substrate supports, e.g., coated electrostatic chucks, having a dielectric multilayer formed thereon; dielectric multilayers that provide erosive and corrosive barrier protection in harsh environments such as plasma treating vessels used in semiconductor device manufacture; process chambers, e.g., deposition chambers, for processing substrates; methods for protecting substrate supports; and methods for producing substrate supports and electronic devices. The dielectric multilayer comprises (a) an undercoat dielectric layer comprising a metal oxide or metal nitride formed on a surface; and (b) a topcoat dielectric layer comprising a metal oxide formed on the undercoat dielectric layer. The topcoat dielectric layer has an aluminum oxide content of less than about 1 weight percent. The topcoat dielectric layer has a corrosion resistance and/or plasma erosion resistance greater than the corrosion resistance and/or plasma erosion resistance of the undercoat dielectric layer. The undercoat dielectric layer can have a resistivity greater than the resistivity of the topcoat dielectric layer. The topcoat dielectric layer can have a dielectric constant greater than …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.