Memory circuits, systems, and methods for accessing the memory circuits
US8619483B2 · kind B2 · utility
4Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 7, 2010 |
| Grant date | Dec 31, 2013 |
| Priority date | — |
| Expiry date | Jan 26, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4097
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory circuit includes at least one memory cell for storing a charge representative of a datum. The memory cell is coupled with a word line and a bit line. A sense amplifier is coupled with the bit line. The sense amplifier is capable of precharging the bit line to a first voltage that is substantially equal to and higher than a threshold voltage (Vt) of a first transistor of the sense amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.