Retargetable instruction set simulators
US8621444B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2004 |
| Grant date | Dec 31, 2013 |
| Priority date | — |
| Expiry date | Jul 18, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/45504
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods for simulating an instruction set architecture (ISA) with a instruction set simulator (ISS) are provided. One exemplary embodiment of the methods includes fetching a first decoded instruction during a run time, where the decoded instruction is decoded from an original instruction in a target application program during a compile time preceding the run time. The decoded instruction can designate a template configured to implement the functionality of the original instruction. The method also preferably includes determining whether the fetched instruction is modified from the original instruction and then executing the designated template if the instruction was not modified. The method can also include decoding the original instruction during the compile time by selecting a template corresponding to the original instruction and then customizing the template based on the data in original instruction. The method can also include optimizing the customized template during the compile time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.