Light emitting diode having vertical topology and method of making the same
US8624288B2 · kind B2 · utility
4Cited by
12References
19Claims
0Family size
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Key dates
| Filing date | Aug 26, 2011 |
| Grant date | Jan 7, 2014 |
| Priority date | — |
| Expiry date | Oct 6, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/872
Abstract
An LED having vertical topology and a method of making the same is capable of improving a luminous efficiency and reliability, and is also capable of achieving mass productivity. The method includes forming a semiconductor layer on a substrate; forming a first electrode on the semiconductor layer; forming a supporting layer on the first electrode; generating an acoustic stress wave at the interface between the substrate and semiconductor layer, thereby separating the substrate from the semiconductor layer; and forming a second electrode on the semiconductor layer exposed by the separation of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.