Semiconductor device
US8624328B2 · kind B2 · utility
2Cited by
2References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 6, 2009 |
| Grant date | Jan 7, 2014 |
| Priority date | — |
| Expiry date | Jul 9, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a semiconductor device including: a semiconductor substrate; a multi-layered wiring structure which is formed over the semiconductor substrate and in which a plurality of wiring layers, each of which is formed by a wiring and an insulating layer, are laminated; and a capacitive element having a lower electrode, a capacitor insulating layer, and an upper electrode which is embedded in the multi-layered wiring structure, wherein at least two or more of the wiring layers are provided between a lower capacitor wiring connected to the lower electrode and an upper capacitor wiring connected to the upper electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.