Pseudo multi-master I2C operation in a blade server chassis
US8626973B2 · kind B2 · utility
9Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2011 |
| Grant date | Jan 7, 2014 |
| Priority date | — |
| Expiry date | Mar 2, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method are directed towards a pseudo multi-master operation on a serial bus. The pseudo multi-master operation allows multiple devices without standard multi-master functionality to operate on the serial bus as masters. In a disclosed example, the serial bus is an Inter-Integrated Circuit (I2C) bus, which is isolated when an adapter card requires access to the I2C bus, such as to update vital product data (VPD) to a memory device, and to cache the updated VPD to a chassis management module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.