Multi-LUN SSD optimization system and method
US8626991B1 · kind B1 · utility
5Cited by
3References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 30, 2011 |
| Grant date | Jan 7, 2014 |
| Priority date | — |
| Expiry date | Nov 9, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7211
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, computer program product, and computing system for dividing a physical memory device into at least a first logical memory device and a second logical memory device. The physical memory device includes a plurality of physical memory elements. A first portion of the plurality of physical memory elements is assigned to the first logical memory device. A second portion of the plurality of physical memory elements is assigned to the second logical memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.