Patent · US Active

Apparatus, system, and method for memory upgrade path optimization

US8627003B2 · kind B2 · utility

2Cited by
3References
25Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 24, 2009
Grant dateJan 7, 2014
Priority date
Expiry dateNov 2, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F15/177
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An apparatus, system, and method are disclosed for memory upgrade optimization. A requirements module 402 receives one or more of a capacity upgrade goal 1306 for an overall capacity of the array 706 and a performance upgrade goal 1308 for an overall performance of the array 706. An analysis module 404 identifies a first potential capacity change 1310 that can be achieved at a lower overall performance and a second potential capacity change 1314 that can be achieved at a higher overall performance. A reconfiguration module 406 generates one or more of a first reconfiguration recommendation 1312 calculated to yield an overall capacity improvement that takes into consideration the capacity upgrade goal 1306 and the first potential capacity change 1310 and a second reconfiguration recommendation 1316 calculated to yield an overall performance improvement that takes into consideration the performance upgrade goal 1308 and the second potential capacity change 1314.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.