Method for three-dimensional packaging of electronic devices
US8629061B2 · kind B2 · utility
4Cited by
7References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2012 |
| Grant date | Jan 14, 2014 |
| Priority date | — |
| Expiry date | Jul 18, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/16
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An interposer is fabricated from a lamina. A donor body is provided, ions are implanted into a first surface of the donor body to define a cleave plane, a temporary carrier is separably contacted to the donor body, and the lamina is cleaved from the donor body. The lamina has front surface and a back surface, with a thickness from the front surface to the back surface. A via hole is formed in the lamina, where the via hole extends through the thickness of the lamina. The temporary carrier is removed from the lamina, and the lamina may be fabricated into an interposer for three-dimensional integrated circuit packages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.