Semiconductor memory device and method for manufacturing the same
US8629528B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2012 |
| Grant date | Jan 14, 2014 |
| Priority date | — |
| Expiry date | Jul 25, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/683
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a semiconductor memory device includes a plurality of word lines formed on a semiconductor substrate at predetermined intervals, selecting transistors arranged on at least one side of the plurality of word lines, an interlayer insulating film formed to cover upper surfaces of the word lines and the selecting transistors, a first air gap located between each pair of adjacent ones of the word lines and covered by the interlayer insulating film, a second air gap located at a first side wall portion of a word line adjacent to the selecting transistors covered by the interlayer insulating film, the first side wall portion facing the selecting transistors, and a third air gap located at a second side wall portion of each of the selecting transistors and covered by the interlayer insulating film. The first, second, and third air gaps are filled with air.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.