Receiver for receiving signal containing clock information and data information, and clock-embedded interface method
US8630373B2 · kind B2 · utility
1Cited by
1References
17Claims
0Family size
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Key dates
| Filing date | Sep 3, 2010 |
| Grant date | Jan 14, 2014 |
| Priority date | — |
| Expiry date | Feb 20, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/4917
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A receiver for receiving information that contains clock information and data information and a clock-embedded interface method. In the clock-embedded method, a clock signal and data may be reconstructed by receiving a pair of differential signals that contain clock information and data information and by using a change in a common voltage of the pair of differential signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.