Patent · US Active

High speed data testing without high speed bit clock

US8630821B2 · kind B2 · utility

2Cited by

20References

28Claims

0Family size

Assignee

QUALCOMM Incorporated · US

Inventors

Miao Li · Shanghai, CN
Xiaohua Kong · San Diego, US
Nam V. Dang · San Diego, US
Cheng Zhong · San Diego, US

Key dates

Filing date	Jul 25, 2011
Grant date	Jan 14, 2014
Priority date	—
Expiry date	Jul 11, 2032

Classification

Technology area (CPC G)Physics
CPC primaryG09G2370/12
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

System and method for testing a high speed data path without generating a high speed bit clock, includes selecting a first high speed data path from a plurality of data paths for testing. Coherent clock data patterns are driven on one or more of remaining data paths of the plurality of data paths, wherein the coherent clock data patterns are in coherence with a low speed base clock. The first high speed data path is sampled by the coherent clock data patterns to generate a sampled first high speed data path, which is then tested at a speed of the low speed base clock.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.