Forward error correction with extended effective block size
US8631309B2 · kind B2 · utility
6Cited by
4References
56Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 4, 2012 |
| Grant date | Jan 14, 2014 |
| Priority date | — |
| Expiry date | Aug 25, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0057
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In an aspect, in general, a forward error correction algorithm (FEC) utilizes an FEC block structure in a manner that extends the effective error correction such that it can approach an “infinite” length to obtain benefits typical of very large FEC block size without the commensurate computation cost.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.