Patent · US Active

Method and circuit to generate race condition test data at multiple supply voltages

US8631368B2 · kind B2 · utility

1Cited by

26References

46Claims

0Family size

Assignee

QUALCOMM Incorporated · US

Inventors

Xiaoliang Bai · San Diego, US
Xiaonan Zhang · San Diego, US

Key dates

Filing date	Mar 30, 2010
Grant date	Jan 14, 2014
Priority date	—
Expiry date	Apr 20, 2031

Classification

Technology area (CPC G)Physics
CPC primaryG06F11/24
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method and circuit for characterizing a process variation of a semiconductor die is disclosed. In a particular embodiment, the method includes operating a circuit at multiple supply voltage levels to generate race condition testing data. The circuit is disposed on at least one die of a wafer and includes at least one racing path circuit having at least two paths. The method further includes collecting the race condition testing data and evaluating the collected race condition testing data. The race condition testing data is correlated to a process variation of the at least one die.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.