Semiconductor device having first and second resistance for suppressing loop oscillation
US8633527B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 7, 2012 |
| Grant date | Jan 21, 2014 |
| Priority date | — |
| Expiry date | Sep 7, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/423
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes: a semiconductor element; a divider connected with an input portion of the semiconductor element; and a combiner connected with an output portion of the semiconductor element. The divider is disposed on a substrate and has a first divider portion including a first transmission line and a second transmission line, a second divider portion including a third transmission line and a fourth transmission line, and a first resistance and a second resistance respectively connected to both the first transmission line and the third transmission line. The first resistance is disposed in the space between the first and third transmission lines, the second resistance is disposed in the space between the first and third transmission lines, and the first resistance is disposed between the second resistance and the semiconductor element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.