Low ohmic through substrate interconnection for semiconductor carriers

US8633572B2 · kind B2 · utility

Assignee

• KONINIKLIJKE PHILIPS N.V. · NL

Inventors

• Gereon Vogtmeier · Aachen, DE
• Roger Steadman · Aachen, DE
• Ralf Dorscheid · Kerkrade, NL
• Jeroen Jonkers · Seevetal, DE

Key dates

• Filing date: Mar 16, 2007
• Grant date: Jan 21, 2014
• Expiry date: May 15, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2224/131
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

It is described a low ohmic Through Wafer Interconnection (TWI) for electronic chips formed on a semiconductor substrate (600). The TWI comprises a first connection extending between a front surface and a back surface of the substrate (600). The first connection (610) comprises a through hole filled with a low ohmic material having a specific resistivity lower than poly silicon. The TWI further comprises a second connection (615) also extending between the front surface and the back surface. The second connection (615) is spatially separated from the first connection (610) by at least a portion of the semiconductor substrate (600). The front surface is provided with a integrated circuit arrangement (620) wherein the first connection (610) is electrically coupled to at least one node of the integrated circuit arrangement (620) without penetrating the integrated circuit arrangement (620). During processing the TWI the through hole may be filled first with a non-metallic material, e.g. poly silicon. After forming integrated components (620) on top of the front surface the substrate (600) may be thinned and the non-metallic material may be substituted with the low ohmic material, which…