Direct feedback equalization with dynamic referencing
US8634500B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2012 |
| Grant date | Jan 21, 2014 |
| Priority date | — |
| Expiry date | Mar 27, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2025/0349
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A receiver circuit includes a first slicer coupled to receive data signals from a signal path and a reference voltage from a reference voltage path that is separate from the signal path. The first slicer is configured output a logic value based on a comparison between a voltage of the data signal and the reference voltage. The receiver circuit further includes a reference voltage generator configured to generate the reference voltage. The reference voltage generator is configured to dynamically generate the reference voltage based on logic values of previously received signals during operation in a first mode. During operation in a second mode, the reference voltage generator is configured to generate and provide the reference voltage as a static voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.