Mixed mode dual switch
US8637909B1 · kind B1 · utility
19Cited by
5References
29Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 9, 2012 |
| Grant date | Jan 28, 2014 |
| Priority date | — |
| Expiry date | May 30, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Various aspects of the technology provide for a converter circuit such as a dc-dc voltage converter or buck converter. The circuit includes a enhancement mode control Field Effect Transistor (FET) fabricated using gallium arsenide and an depletion mode sync FET fabricated using gallium arsenide. A drain of the sync FET may be coupled to a source of the control FET and an inductor may be coupled to the source of the control FET and the drain of the sync FET.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.