Patent · US Active

Vertical mount transient voltage suppressor array

US8638535B2 · kind B2 · utility

1Cited by
21References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 10, 2011
Grant dateJan 28, 2014
Priority date
Expiry dateFeb 12, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/3025
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A system comprises a package with top and bottom surfaces, a plurality of high-power transient voltage suppressors arranged within the package, and a robust lead frame. Each of the transient voltage suppressors has first and second major surfaces substantially perpendicular to the top and bottom surfaces of the package. The lead frame comprises leads connected to the major surfaces of the transient voltage suppressors. Each of the leads has a thickness greater than about 0.015 inches (or 0.381 mm) in a mounting portion, in order to dissipate heat from the transient voltage suppressors and to resist vibration-induced stress on the package.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.