Generation of a disparity result with low latency
US8639024B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 1, 2012 |
| Grant date | Jan 28, 2014 |
| Priority date | — |
| Expiry date | Aug 1, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N2013/0081
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system for generating disparity results comprises an interface, a first memory, a second memory, and a processor. The interface is for receiving a first element of a first set of image data and a first element of a second set of image data. The first memory is for storing the first element of the first set of image data. The second memory is for storing the first element of the second set of image data. The processor is for generating a disparity result for a first element before all elements of the first data set and the second data set have been received. The disparity result is generated using a low latency image processing system that processes a plurality of elements of the first set of image data and a plurality of elements of the second set of image data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.