Semiconductor device manufacturing method
US8642470B2 · kind B2 · utility
2Cited by
7References
4Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 9, 2011 |
| Grant date | Feb 4, 2014 |
| Priority date | — |
| Expiry date | Dec 9, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a semiconductor device manufacturing method. This method comprises: etching a first dielectric layer to form a recess; depositing a second dielectric layer over said first dielectric layer and said recess, such that said recess is enclosed by said first dielectric layer and said second dielectric layer to form an air gap; and performing etching, such that a first trench is formed in said first dielectric layer and said second dielectric layer, adjacent to said air gap. The first trench can be filled with a conductive material to form wiring.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.