Phase-locked loop having a constant damping ratio
US8643415B1 · kind B1 · utility
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3References
9Claims
0Family size
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Key dates
| Filing date | Oct 22, 2012 |
| Grant date | Feb 4, 2014 |
| Priority date | — |
| Expiry date | Oct 22, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0895
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A filter circuit in a phase-locked loop circuit includes a capacitor coupled between a control voltage node and a first node; and a variable resistive element coupled between the first node and a ground potential. The variable resistive element has a resistance value modulated by a current proportional to the charge pump current of the charge pump. In one embodiment, the variable resistive element is a MOS transistor biased in the linear region and having a drain-to-source resistance modulated by the current proportional to the charge pump current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.