Methods and systems for determining an offset term for a synthesizer signal, and methods and systems for producing a phase-corrected digital signal
US8644783B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 19, 2012 |
| Grant date | Feb 4, 2014 |
| Priority date | — |
| Expiry date | Jul 27, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01S19/29
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A fractional-N PLL synthesizer has an up-down counter counting up for positive edges of a frequency-divided signal produced by a frequency divider with a fractional divide ratio in a feedback path of the synthesizer and down for positive edges of a reference signal. A phase offset between portions of the synthesizer signal before and after a loss-of-lock interval is then assessed as a numerical value proportional to the product of the divide ratio and the cycle difference registered by the up-down counter (36) after the loss-of-lock interval. A correction term derived from the phase offset can be used in a signal processing device as employed, e.g., in a GNSS receiver, for producing, from an analog input signal, a phase-corrected baseband signal where portions of the signal before and after loss of lock are phase coherent.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.