Interrupt techniques
US8645596B2 · kind B2 · utility
1Cited by
27References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2008 |
| Grant date | Feb 4, 2014 |
| Priority date | — |
| Expiry date | Jun 15, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/9094
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Techniques are described that can be used by a message engine to notify a core or hardware thread of activity. For example, an inter-processor interrupt can be used to notify the core or hardware thread. The message engine may generate notifications in response to one or more message received from a transmitting message engine. Message engines may communicate without sharing memory space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.