Optimized flash based cache memory
US8645619B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2012 |
| Grant date | Feb 4, 2014 |
| Priority date | — |
| Expiry date | Jul 19, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/222
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the invention relate to throttling accesses to a flash memory device. The flash memory device is part of a storage system that includes the flash memory device and a second memory device. The throttling is performed by logic that is external to the flash memory device and includes calculating a throttling factor responsive to an estimated remaining lifespan of the flash memory device. It is determined whether the throttling factor exceeds a threshold. Data is written to the flash memory device in response to determining that the throttling factor does not exceed the threshold. Data is written to the second memory device in response to determining that the throttling factor exceeds the threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.